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Chip Size Packaging (CSP) for RF MEMS Devices

Abstract:

Currently, there are two types of CSP packaging techniques: Flip-chip CSP (FC-CSP) and Wafer-level CSP packaging (WLCSP). FC packaging technology has been in use for over 40 years. It was first introduced by IBM in the 1970s and was subsequently adopted by other chip makers. The main advantage of FC-CSP packaging is its small size. Although there is no definite rule for how small the pack- age should be, a typical FC-CSP packaged device is 50–100% larger than its original die (chip) size. It is a significant improvement from the traditional wire-bonding-based (SMD and QFN) packaging technologies.

In contrast, WLCSP is a recent technique that has attracted much attention. Chips packaged using WLCSP are even smaller than the ones packaged using FC-CSP technique. WLCSP also employs a great deal of front-end processes (photo lift, sputtering, etching, etc.). Therefore, many people working on this technology refer to it as a “medium” process (half front-end and half back-end) rather than back-end process.

In the following sections, we will discuss the details of CSP packaging for RF MEMS chips. Although there are many types of RF MEMS devices (switches, filters, tunable capacitors, and phase shifters), micro-acoustic wave filters (BAW and SAW filters) are the most widely used RF MEMS devices at the moment. Hence, the present chapter will focus on the packaging for SAW and BAW filters.